Radio communication semiconductor integrated circuit, data processing semiconductor integrated circuit and portable device

ABSTRACT

A portable device having a communication function composed of a plurality of LSIs operated in synchronization with a clock, such as a baseband LSI and a logic LSI such as an application processor, can synchronize the baseband LSI with the logic LSI without lowering the performance of the logic LSI.

This application is a continuation application of U.S. application Ser.No. 10/948,138, filed Sep. 24, 2004, now allowed, the entirety of whichis incorporated herein by reference.

BACKGROUND OF THE INVENTION

The present invention relates to a technique effective to be applied toa clock synchronization technique in a communication system, further inthe case of synchronizing two or more semiconductor integrated circuitsoperated by different clock signals, respectively. For instance, thepresent invention relates to a technique effective to be used in aportable phone including an LSI (baseband LSI) performing modulation anddemodulation processing of voice data and a logic LSI (applicationprocessor) compressing and decompressing voice data.

In recent years, portable phones having a videophone function have beendeveloped. A portable phone having a videophone function has a basebandLSI performing baseband processing such as modulation and demodulationof voice data, a logic LSI called an application processor compressingand decompressing voice data and moving image data, and a radiofrequencyLSI performing up-convert of a transmission signal and down-convert of areception signal.

In the case of performing communication between portable phones, theymust be synchronized with each other. A portable phone is operated by aclock signal (hereinafter, simply called a clock) generated by its ownoscillator. Due to a variation in frequency of the respectiveoscillators and a frequency drift with temperature change, a clockfrequency is different in each portable phone. The Doppler shift by fastmovement of the user of a portable phone causes a difference betweenclocks. Correct synchronization cannot be obtained. Accordingly, in aportable phone system, each of portable phones has an AFC (AutomaticFrequency Correction) function correcting a clock frequency of theportable phone based on time information of a master clock of a basestation included in data received from the base station to the portablephone, ensuring synchronization between the portable phones.

SUMMARY OF THE INVENTION

As shown in FIG. 9, a portable phone having a videophone function has abaseband LSI 100, a radiofrequency LSI 200, and an application processor300. The baseband LSI 100 generates an internal clock CLK1 having afrequency obtained by multiplying a clock φ0 of 13 MHz or 26 MHz from anoscillator 230 incorporated in the radiofrequency LSI 230 as a referenceclock by a PLL circuit, to operate a CPU 110 in synchronization withthis. The application processor 300 generates an internal clock CLK2having a frequency obtained by multiplying a clock φ1 from its ownoscillator as a reference clock by a PLL circuit to operate a CPU 310 insynchronization with this. A clock CLK3 obtained by frequency dividingit operates a peripheral circuit such as a timer counter.

The operation of the baseband LSI is synchronized with a master clock ofa base station. However, the operation of the baseband LSI is notsynchronized with the operation of the application processor. In thecase of transmitting and receiving voice data and moving image databetween portable devices, data exceeding the processing ability of theportable device of the party on one end is transmitted when a clockfrequency of the portable device of the party on the other end ishigher. In the processing while storing received data in a buffer, thebuffer is overflowed after a long period of time elapses. The normalreception state cannot be maintained.

In order to synchronize the operation of the baseband LSI with theoperation of the application processor, it can be considered that, as inthe baseband LSI, the application processor generates an internal clockhaving a frequency obtained by multiplying the clock φ0 from theoscillator incorporated in the radiofrequency LSI as a reference clockby the PLL circuit for operation. The frequency of the internal clock ofthe application processor is limited to an integral multiple (a power of2) of the clock φ0 of the oscillator incorporated in the radiofrequencyLSI. In the case that the maximum frequency is not an integral multipleof the clock φ0, the CPU must be operated at a frequency lower thanthat. The performance of the application processor cannot besatisfactorily exerted.

An object of the present invention is to provide a portable devicehaving a communication function composed of a plurality of LSIs operatedin synchronization with clocks, such as a baseband LSI and a logic LSIsuch as an application processor, which can synchronize the baseband LSIwith the logic LSI without lowering the performance of the logic LSI.

Another object of the present invention is to provide a portable devicewhich can maintain the normal reception state over a long period oftime. The above and other objects and novel features of the presentinvention will be apparent from the description of this specificationand the attached drawings.

The description of the representative invention disclosed in the presentinvention is as follows.

In a portable device having a communication function composed of aplurality of LSIs respectively operated in synchronization withdifferent clocks, such as a radio communication semiconductor integratedcircuit (baseband LSI) performing processing of modulating transmitteddata and demodulating received data and a data processing semiconductorintegrated circuit (application processor) performing processing ofcompressing transmitted data and decompressing received data, thebaseband LSI has a function of detecting a frequency drift of a clocksignal based on time information for synchronization included in thereceived data and a terminal or an interface for outputting a signalincluding its own time information to the outside, and the applicationprocessor performing compression processing of data to be transmittedand decompression processing of received data has a terminal or aninterface for inputting a signal including time information from theoutside, and the signal including time information is fed from thebaseband LSI to the application processor. As the signal including timeinformation, there are the clock signal, a signal periodically generatedby a timer, and a text signal and a binary code signal indicating time.Any one of the signals may be used.

According to the above-described means, the application processor whichhas received a signal including time information corrects time of thetimer in its own chip so as to be matched with time information receivedfrom the baseband LSI, thereby synchronizing the baseband LSI with theapplication processor. The baseband LSI has a function of matching itsown clock with a master clock included in received data from a basestation. The operation of the application processor can be alsosynchronized with the master clock. The timer on the applicationprocessor side may be a timer counter composed of hardware or a softwaretimer provided in a RAM (random access memory) and updated by a program.

In the case that the application processor has a function of DMAtransferring sampled voice data or image data, the number of the DMAtransferred voice data or image data may be reset based on a differencebetween time information fed from the baseband LSI to the applicationprocessor and time information of the timer on the application processorside. For the processing of transmitted data and received data, the timeof the baseband LSI can be synchronized with the time of the applicationprocessor.

An effect obtained by the representative invention disclosed in thepresent invention will be briefly described as follows.

A portable device having a communication function composed of aplurality of LSIs operated in synchronization with clocks, such as abaseband LSI and a logic LSI such as an application processor, cansynchronize the baseband LSI with the logic LSI without lowering theperformance of the logic LSI. A portable device which can maintain thenormal reception state over a long period of time can be realized.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a block diagram showing a first embodiment in which thepresent invention is applied to a portable device, such as a portablephone, having a radio communication function;

FIG. 2 is a block diagram showing a second embodiment in which thepresent invention is applied to a portable device, such as a portablephone, having a radio communication function;

FIG. 3 is a block diagram showing a third embodiment in which thepresent invention is applied to a portable device, such as a portablephone, having a radio communication function;

FIG. 4 is a timing chart showing the relation between time informationon a baseband side stored in a shared RAM in the case that time on thebaseband side is matched with time of the application processor, andtime of a timer counter in the application processor and timing ofvarious processing;

FIG. 5 is a timing chart showing the relation between time informationon a baseband side stored in a shared RAM in the case that time on thebaseband side is earlier than time of the application processor, andtime of a timer counter in the application processor and timing ofvarious processing;

FIG. 6 is a timing chart showing the relation between time informationon a baseband side stored in a shared RAM in the case that time on thebaseband side is later than time of the application processor, and timeof a timer counter in the application processor and timing of variousprocessing;

FIG. 7 is a flowchart schematically showing a procedure of voice dataprocessing in the application processor;

FIG. 8 is a flowchart showing a detailed procedure of processing by aninterrupt handler in step S3 of the flowchart of FIG. 7; and

FIG. 9 is a block diagram showing a system configuration example of aprior art portable phone having a videophone function.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

Preferred embodiments of the present invention will be described belowbased on the drawings.

EMBODIMENT 1

FIG. 1 shows a first embodiment in which the present invention isapplied to a portable device, such as a portable phone, having a radiocommunication function. A portable device of this embodiment has abaseband LSI 100 performing processing of modulating transmitted dataand demodulating received data, a radiofrequency LSI 200 performingup-convert of a transmission signal and down-convert of a receptionsignal, and an application processor 300 as a logic LSI decompressingand compressing voice data or moving image data.

The radiofrequency LSI 200 has a radiofrequency circuit 210 performingup-convert of a transmission signal and down-convert of a receptionsignal and amplifying a signal, a D/A and A/D converter circuit 220converting transmitted data to an analog signal and converting areception signal to a digital signal, a voltage-controlled oscillatorcircuit 230 generating a clock φ0 fed to the radiofrequency circuit 210for frequency converting a transmission signal or a reception signal andoperating the D/A and A/D converter circuit 220, and a DA convertercircuit 240 giving an oscillation control voltage Vct to the oscillatorcircuit 230 based on controlled data from the outside of the chip. Theradiofrequency circuit 210 is provided with a PLL circuit generating aclock having a radiofrequency obtained by multiplying the clock φ0 fromthe voltage-controlled oscillator circuit 230 as a reference clock.

The baseband LSI 100 has a CPU 110 performing modulation anddemodulation processing and control of the entire chip, a clockgenerator circuit (CPG) 120 having a PLL circuit PLL1 generating aninternal clock CLK1 obtained by multiplying a clock signal fed from theoutside of the chip and a divider circuit DIV1 frequency dividing theclock CLK1 generated by the PLL to generate an operation clock of aperipheral circuit, a clock output terminal 130 for outputting a clockCLK0 frequency divided by the divider circuit DIV1 to the outside of thechip, and an RF interface transmitting and receiving transmitted andreceived data between the baseband LSI 100 and the radiofrequency LSI200. In this embodiment, the clock φ0 from the oscillator circuit 230 ofthe radiofrequency LSI 200 is inputted as a reference clock to thebaseband LSI 100. The oscillator circuit 230 may be an externaloscillator.

The baseband LSI 100 has an AFC function generating data detecting adifference between two clocks from the frequency of the internal clockCLK1 generated based on the reference clock φ0 from the radiofrequencyLSI 200 and information on a master clock included in received data froma base station and correcting the difference. The AFC function isrealized by software processing of the CPU 110.

Corrected data generated by the AFC function is fed via the RF interface140 to the DA converter circuit 240 of the radiofrequency LSI 200 to beconverted to an analog signal. The signal is applied as the oscillationcontrol voltage Vct to the oscillator circuit 230 to correct thefrequency of the reference clock φ0.

The application processor 300 comprises a CPU 310 performing softwareprocessing of compression and decompression of voice data or image data,a clock generator circuit 320 having a PLL circuit PLL3 generating aninternal clock CLK2 obtained by multiplying a clock signal φ1 from anoscillator XO1 externally provided to the external terminal of the chipand a divider circuit DIV3 frequency dividing the clock CLK2 generatedby the PLL to generate an operation clock CLK3 of the peripheralcircuit, a clock input terminal 330 for inputting the clock CLK0outputted from the baseband LSI 100, a timer 340 count operated based ona clock from the baseband LSI 100, and a controller circuit 350operating the timer 340 upon reception of the clock CLK0 inputted fromthe clock input terminal 330. The controller circuit 350 has a functionof resetting the timer 340 at power-up or suitable timing and reading avalue of the timer 340. The controller circuit 350 may be a simplebuffer without any complicated functions which converts a signal fromthe outside to a signal of amplitude suitable to the inside of the chip.

The CPU 310 is operated by the internal clock CLK2 generated based onthe clock signal φ1 of the oscillator XO1 and can detect a differencebetween the clock CLK0 (CLK1) of the baseband LSI 100 and the clock CLK2of the application processor 300 by referring to a value of the timer340 count operated based on the clock CLK0 from the baseband LSI 100.The processing operation on the application processor side, such asimage data compression processing, can be synchronized with theprocessing operation on the baseband LSI 100 side. The internal clocksCLK1 and CLK2 have a frequency of hundreds of MHz, respectively. Theoscillator XO1 has a crystal oscillator circuit with a high accuracy.

EMBODIMENT 2

FIG. 2 shows a second embodiment in which the present invention isapplied to a portable device, such as a portable phone, having a radiocommunication function.

As in the first embodiment, a portable device of this embodiment has abaseband LSI 100 performing modulation and demodulation processing, aradiofrequency LSI 200 performing up-convert of a transmission signaland down-convert of a reception signal, and an application processor 300compressing and decompressing voice data or moving image data. Therelation between the baseband LSI 100 and the radiofrequency LSI 200 isthe same as that of the first embodiment.

This embodiment is different from the first embodiment in that in placeof the clock output terminal outputting a clock generated by the clockgenerator circuit 120 of the baseband LSI 100 to the outside, a timer150 updated by a clock generated by a clock generator circuit 120 and aterminal 131 outputting to the outside a time-up signal TUS indicatingthat a predetermined time from the timer 150 elapses are provided in thebaseband LSI 100, and that an interrupt controller circuit 360 isprovided in the application processor 300, the time-up signal TUS fromthe timer 150 of the baseband LSI 100 is inputted as a timer interruptsignal to the interrupt controller circuit 360, and in the case thatthere is an timer interrupt to the interrupt controller circuit 360, theCPU 310 performs update operation of its own timer 340 in interruptprocessing. The timer interrupt occurs in a cycle of e.g., 1 ms(millisecond).

The timer 150 may be a timer counter composed of hardware or may be asoftware timer configured in a RAM (memory circuit which is alwaysreadable and writable) update operated by a program. Since the CPU 110executing the program is operated by a clock CLK1, the value of thetimer 150 as a software timer is updated in synchronization with theclock CLK1. The timer 340 on the application processor 300 side may bealso a timer counter or a software timer. The CPU 310 on the applicationprocessor 300 side is operated in synchronization with a clock CLK2. Inthe case that the timer 340 is a software timer, the timer 340 isupdated in synchronization with the clock CLK2. However, the cycle (1ms) of an interrupt from the baseband LSI 100 side is sufficientlylonger than the cycle of the clock CLK2. Thus, the timer 340 can beregarded as being synchronized with the clock CLK1 on the baseband LSI100 side.

The CPU 310 of the application processor 300 is operated by the internalclock CLK2 generated based on a clock signal φ1 of its own oscillatorXO1 in the clock generator circuit 320 and can detect a differencebetween the clock CLK1 of the baseband LSI 100 and the clock CLK2 of theapplication processor 300 by referring to a value of the timer 340update operated based on a timer interrupt from the baseband LSI 100.The processing operation on the application processor side, such asimage data compression processing, can be synchronized with theprocessing operation on the baseband LSI 100 side.

As in the application processor 300, as the baseband LSI 100, an LSIhaving a configuration similar to that of a general-purposemicroprocessor having a CPU and a RAM may be used. The baseband LSI 100having such architecture may have an interrupt controller circuit andexecute various processing by a timer interrupt. The baseband LSI 100having such timer interrupt function is provided with a timer (counter)for a timer interrupt. The interrupt output of the timer is fed to theinterrupt controller circuit 360 of the application processor 300.Accordingly, the function of this embodiment can be realized withoutincreasing hardware very much.

EMBODIMENT 3

FIG. 3 shows a third embodiment in which the present invention isapplied to a portable device having a radio communication function. Thisembodiment is applied to a portable device, such as a portable phone,having a videophone function transmitting and receiving a still image ora moving image with voice.

As in the second embodiment, a portable device of this embodiment has abaseband LSI 100 performing modulation and demodulation processing, aradiofrequency LSI 200 performing up-convert of a transmission signaland down-convert of a reception signal, and an application processor 300compressing and decompressing voice data or moving image data. Thebaseband LSI 100 is provided with a timer counter 150. The applicationprocessor 300 is provided with a timer counter 340 and an interruptcontroller circuit 360. In the second embodiment, the timer counter 340is update processed by an interrupt to the interrupt controller circuit360. In this embodiment, the timer counter 340 is composed of hardwareso as to be operated by an internal clock CLK2 generated based on aclock signal φ1 of its own oscillator XO1 in the clock generator circuit320. In FIG. 3, circuits similar to or corresponding to those of FIG. 1are indicated by the same reference numerals and the overlappeddescription is omitted.

In this embodiment, the application processor 300 is connected, asexternal devices, to a liquid crystal display device 410 as displaymeans, a speaker 420 for voice output, a microphone 430 for voice input,an AD/DA converter circuit 440 performing DA conversion of an outputsignal to the speaker 420 and AD conversion of an input signal from themicrophone 430, a solid-state imaging device (camera) 450 having a CCD(charge-coupled device) or a MOS sensor, an external ROM (read onlymemory) 460 having an OS (operation system) executed by the CPU 310 anda flash memory storing a user program, and an external RAM 470 having anSDRAM providing an area of an OS timer managed by the CPU 310 accordingto the OS.

The baseband LSI 100 is connected to an external ROM 480 storing aprogram executed by a CPU 110 of the baseband LSI 100 as an externaldevice and is provided with an interrupt controller circuit 160 forexecuting timer interruption processing. The baseband LSI 100 may bealso provided with an external RAM providing an area such an OS timermanaged by the CPU 110 according to the OS.

Not being particularly limited, in this embodiment, the AD/DA convertercircuit 440 is operated in synchronization with a clock signal φ2obtained by frequency dividing a clock φ1 generated by the oscillatorXO1 generating a reference clock of the application processor 300 by adivider circuit DIV2, and the solid-state imaging device (camera) 450 isoperated in synchronization with a clock signal φ3 from an oscillatorXO2 provided separately from the oscillator XO1 generating the referenceclock φ1. The clock signal φ2 has a frequency of e.g., 8 kHZ. A voicesignal from the microphone 430 is sampled for each 125 μs by the AD/DAconverter circuit 440 to be converted to a digital signal.

The application processor 300 is provided with a voice interface 381inputting and outputting a signal of the speaker 420 and the microphone430 according to the external devices and an image interface 382inputting an image signal from the solid-state imaging device 340. Inthis embodiment, in order to transmit and receive data between thebaseband LSI 100 and the application processor 300, the baseband LSI 100is provided with an interface 180 and the application processor 300 isprovided with an interface 380.

Further, the application processor 300 of this embodiment is providedwith a shared RAM 391 having two input-output ports and having a dualport memory accessible from both of the baseband LSI 100 and theapplication processor 300 as a buffer memory holding data transmittedand received between the baseband LSI and the application processor 300.The application processor 300 is provided with an internal RAM 392providing a working area of the CPU 310 for temporarily storing operateddata, a DMA controller 385 DMA transferring voice data between theinternal RAM 392, the shared RAM 391 and the voice interface 381, a DMAcontroller 386 DMA transferring image data between the internal RAM 392,the shared RAM 391 and the image interface 382, and an external businterface 383 for inputting and outputting data between the external ROM460, the external RAM 470 and the application processor 300.

A method of synchronizing the baseband LSI 100 with the applicationprocessor 300 in this embodiment will be described.

In this embodiment, a value (text signal or binary code) TCC of thetimer counter 150 is stored as time information on the baseband sidefrom the baseband LSI 100 to the shared RAM 391 of the applicationprocessor 300. The time information on the baseband side stored in theshared RAM 391 may not be the value of the timer counter 150 and may bea value of the OS timer managed by the OS (operation system) executed bythe CPU 110. Storing of the time information on the baseband side in theshared RAM 391 is desirably performed periodically, but need not bealways performed periodically. FIGS. 4 to 6 show the relation betweentime information on the baseband side stored in the shared RAM 391, timeof the timer counter 340 in the application processor 300 and timing ofvarious processing, in which FIG. 4 shows the case that both times arealmost matched, FIG. 5 shows the case that time on the baseband side isearlier, and FIG. 6 shows the case that time on the baseband side islater.

FIG. 7 schematically shows a procedure of voice data processing in theapplication processor 300. A voice signal inputted from the microphone430 is sampled for each 125 μs by the AD/DA converter circuit 440 to beconverted to a digital signal. The converted voice data is transferredto the internal RAM 392 by the DMA controller 385 (step S1). Theapplication processor 300 of this embodiment compresses each 160-voicedata. The DMA controller 385 judges whether the number of voice datatransferred to the internal RAM 392 is reached N (normally, 160) or not.When it is reached N, an interrupt signal is inputted from the DMAcontroller 385 to the interrupt controller circuit 360 to start aninterrupt handler (step S2). Transfer of the voice data can be managedby the software timer in the internal RAM 392. In this case, when thenumber of voice data transferred reaches 160, a timer interrupt may begiven to the interrupt controller circuit 360 by the software timer tostart the interrupt handler. As described above, in this embodiment,since a voice signal is sampled for each 125 μs, an interrupt occurs foreach 20 ms (=0.125 ms×160).

When an interrupt occurs, the interrupt handler sets the number of voicedata transferred to N again to instruct start of data transfer to theDMA controller 385 (step S3). The DMA controller 385 starts DMA transferof the voice data again. Thereafter, the interrupt handler issues anevent flag on the program (step S4). When the event flag is issued, theCPU 310 starts phone task processing compressing the 160 voice data andimage data in the internal RAM 392 and executes update of the softwaretimer provided in the internal RAM 392 (step S5). The software timer isused for image data processing. The compressed voice data and image dataare multiplexed to be stored in the shared RAM 391. The above operationis repeated, making it possible to transfer the compressed voice dataand image data to the baseband LSI 100.

As is understood from FIG. 4, in the case that both times are almostmatched with each other, 160 voice data are compressed for each 20 ms inthe time on the baseband side to be multiplexed with the image data andstored in the shared RAM 391. There is no trouble in the case that thebaseband LSI 100 reads voice data in the shared RAM 391 for each 20 ms.As shown in time A of FIG. 5, in the case that time on the baseband sideis earlier, preparation cannot be done when the baseband LSI 100 readsdata in the shared RAM 391 before completing compression of voice dataon the application processor side. Here, transmission and reception ofdata to/from the baseband LSI should be done for each 20 ms. As shown intime A of FIG. 6, in the case that time on the baseband side is laterand the delays are stacked to exceed 20 ms, the next data is storedbefore data stored in the shared RAM 391 is read from the baseband LSI100 so that the buffer can be overflowed. The same thing can occur inimage data.

FIG. 8 shows a detailed procedure of processing by the interrupt handlerin the step S3 of the flowchart of FIG. 7.

When the transfer of N voice data is completed to start the interrupthandler, the processing of FIG. 8 is started and the interrupt handlerdetermines a difference between time on the baseband side in the sharedRAM 391 and time on the application processor side (step S31). Whetherthe time difference exceeds the allowable range or not is judged, and inthe case that it does not exceed the allowable range, the number of datatransferred N is set to the normal “160” to instruct data transferrestart to the DMA controller (step S32-S34 and S37).

When judging that the time difference exceeds the allowable range,whether the time on the baseband side is later or not is judged in stepS33, and when it is later, the number of data transferred N is set to“161” larger than the normal “160” to instruct data transfer restart tothe DMA controller (step S33-S35 and S37). As shown in time B of FIG. 6,data transfer completion can be matched with reading timing of voicedata in the shared RAM 391 by the baseband LSI 100. The CPU 310 discardsone of 161 data transferred in the phone task processing to performcompression processing of 160 data. The correlation between voice datais relatively high. In the case that one data is discarded, lowering ofvoice quality is less.

When judging that the time difference exceeds the allowable range instep S32 and when judging that the time on the baseband side is earlierin step S33, the number of data transferred N is set to “159” smallerthan the normal “160” to instruct data transfer restart to the DMAcontroller (step S33-S36 and S37). As shown in time B of FIG. 5, datatransfer completion can be matched with reading timing of voice data inthe shared RAM 391 by the baseband LSI 100. The CPU 310 uses the samedata as the 159th data of 159 data transferred in the phone taskprocessing as the 160th data to perform compression processing. Thecorrelation between voice data is relatively high. In the case that thesame data is used twice, lowering of voice quality is less.

Methods of determining a difference between time on the baseband sideand time on the application processor side in step S31 of FIG. 8 are asfollows.

A first method is a method of comparing time on the baseband side in theshared RAM 391 with a value of the timer counter 340 on the applicationprocessor side. A second method is a method of comparing time on thebaseband side in the shared RAM 391 with a value of the software timerin the internal RAM 392 on the application processor side. A thirdmethod is a method of comparing time on the baseband side in the sharedRAM 391 with a value of the OS timer in the external RAM 470 on theapplication processor side. Setting of the number of voice datatransferred in steps S34 to S36 may be done by changing a value of thedata transfer counter provided in the DMA controller 385. It may be alsodone by changing a value of the software timer in the internal RAM 392or by changing the OS timer in the external RAM 470. In order to correctthe time difference by changing the OS timer, a correction processingroutine of the OS timer must be previously incorporated into the OSitself and be provided in a subroutine call function for calling theroutine from the user program and executing it. Changing of the softwaretimer in the internal RAM 392 can be corrected by the user program(application program) in the external memory 460 without correcting theOS timer.

In this embodiment, the interrupt handler compares the time informationon the baseband side written into the shared RAM 391 by the baseband LSI100 with the time on the application processor side (a value of thetimer counter 340, the software timer, or the OS timer) to determine atime difference. When the time information on the baseband side iswritten into the shared RAM 391, a difference (time difference) betweenit and the time on the application processor side (a value of the timercounter 340, the software timer, or the OS timer) to store it in theinternal RAM 392 or the external RAM 470. When the interrupt handler isstarted, the time difference is read from the internal RAM 392 or theexternal RAM 470 to perform judgment in step S32 of the flowchart ofFIG. 8. Instead of writing the time difference into the internal RAM 392or the external RAM 470, a pair of the time information on the basebandside and the time on the application side when it is written may bewritten into the internal RAM 392 or the external RAM 470.

The synchronization of the transfer and compression processing of voicedata transmitted is described above. For the transfer and decompressionprocessing of received voice data, in the same manner, the baseband LSI100 can be synchronized with the application processor 300. For imagedata, the image processing software timer updated for each 20 ms in theRAM 392 is corrected based on the time information on the baseband sidewritten into the shared RAM 391 by the baseband LSI 100 to synchronizethe operation of the application processor side with the operation ofthe baseband LSI. The portable phone to which this embodiment is appliedcan maintain synchronization with the operation of a portable phone ofthe party on the other end over a long period of time via transmissionand reception to/from the base station.

The invention which has been made by the present inventors isspecifically described above based on the embodiments. The presentinvention is not limited to the above embodiments and variousmodifications can be made in the scope without departing from itspurpose. For instance, in the above embodiments, a signal including timeinformation on the baseband LSI side fed from the baseband LSI to theapplication processor is transferred via the external terminal or theinterface. A transceiver circuit permitting transmission and receptionby radio communication according to the Bluetooth standards may beprovided in the interface part to transfer a signal including timeinformation.

In the fourth embodiment of FIG. 4, the clock φ2 obtained by frequencydividing the clock φ1 of the oscillator XO1 by the divider DIV2 is asampling clock of the AD/DA converter circuit 440. In a system using aclock of an exclusive oscillator provided separately from the oscillatorXO1 as the sampling clock of the AD/DA converter circuit 440, the aboveembodiments can synchronize the baseband LSI with the applicationprocessor in the image data processing.

Mainly, the case that the invention which has been made by the presentinventors is applied to a portable phone in an application field as itsbackground is described above. The present invention is not limited toit and can be widely used in a portable device having a function ofperforming radio communication using a radio phone communication networksuch as a notebook PC or a PDA (Personal Digital Assistance).

1.-19. (canceled)
 20. A portable device comprising: a radiocommunication semiconductor integrated circuit including means fordetecting a frequency drift of a clock signal based on time informationfor synchronization included in received data, and which is operated insynchronization with said clock signal to perform processing ofmodulating transmitted data and processing of demodulating the receiveddata, said radio communication semiconductor integrated circuit furtherincluding output means for outputting a signal including its own timeinformation to the outside; and a data processing semiconductorintegrated circuit which is operated in synchronization with a clocksignal, and which includes means for performing compression processingof data to be transmitted and decompression processing of received data,said data processing semiconductor integrated circuit further includinginput means for inputting a signal including time information from theoutside; wherein the radio communication semiconductor integratedcircuit and the data processing semiconductor integrated circuit arecoupled so that said signal including time information is fed from saidradio communication semiconductor integrated circuit to said dataprocessing semiconductor integrated circuit, wherein said dataprocessing semiconductor integrated circuit has a timer, andsynchronizes the data processing semiconductor integrated circuit withsaid radio communication semiconductor integrated circuit based on thetime information of said timer and said time information received fromsaid radio communication semiconductor integrated circuit; and whereinsaid data processing semiconductor integrated circuit has a function ofdirect memory access (DMA) transferring sampled voice data or imagedata, and based on a difference between said time information receivedfrom said radio communication semiconductor integrated circuit and timeinformation of said timer, the number of said voice data or image dataDMA transferred is set to synchronize time of said radio communicationsemiconductor integrated circuit with time of said data processingsemiconductor integrated circuit.
 21. The portable device according toclaim 20, wherein when the number of said voice data or image data DMAtransferred is larger than a predetermined number of data, thetransferred last data is discarded, and when the number of said voicedata or image data DMA transferred is smaller than the predeterminednumber of data, the transferred last data is used twice for matchingwith the predetermined number of data.
 22. The portable device accordingto claim 21, wherein each time DMA transfer of said predetermined numberof voice data or image data is completed, compression processing of thenumber of transferred data is performed and a predetermined softwaretimer is updated.
 23. The portable device according to claim 22, whereinsaid software timer is a timer managed by an operating system, and saidoperating system including means for correcting said software timer.